1. Field
The present application relates to semiconductor integrated circuits that implement a variety of optoelectronic functions (such as optical emitters, optical detectors, and optical switches) and electronic functions (such as heterojunction field effect transistors), as well as fabrications methods for such integrated circuits.
2. State of the Art
The present application builds upon technology (referred to by the Applicant as “Planar Optoelectronic Technology” or “POET”) that provides for the realization of a variety of devices (optoelectronic devices, logic circuits and/or signal processing circuits) utilizing inversion quantum-well channel device structures as described in detail in U.S. Pat. No. 6,031,243; U.S. patent application Ser. No. 09/556,285, filed on Apr. 24, 2000; U.S. patent application Ser. No. 09/798,316, filed on Mar. 2, 2001; International Application No. PCT/US02/06802 filed on Mar. 4, 2002; U.S. patent application Ser. No. 08/949,504, filed on Oct. 14, 1997, U.S. patent application Ser. No. 10/200,967, filed on Jul. 23, 2002; U.S. application Ser. No. 09/710,217, filed on Nov. 10, 2000; U.S. Patent Application No. 60/376,238, filed on Apr. 26, 2002; U.S. patent application Ser. No. 10/323,390, filed on Dec. 19, 2002; U.S. patent application Ser. No. 10/280,892, filed on Oct. 25, 2002; U.S. patent application Ser. No. 10/323,390, filed on Dec. 19, 2002; U.S. patent application Ser. No. 10/323,513, filed on Dec. 19, 2002; U.S. patent application Ser. No. 10/323,389, filed on Dec. 19, 2002; U.S. patent application Ser. No. 10/323,388, filed on Dec. 19, 2002; U.S. patent application Ser. No. 10/340,942, filed on Jan. 13, 2003; U.S. patent application Ser. No. 13/921,311, filed on Jun. 19, 2013; and U.S. patent application Ser. No. 14/222,841, filed on Mar. 24, 2014, all of which are hereby incorporated by reference in their entireties.
With these structures, a fabrication sequence can be used to make the devices on a common substrate. In other words, n type and p type contacts, critical etches, etc., can be used to realize all of these devices simultaneously on a common substrate. The essential features of this device structure include: 1) an n-type modulation doped interface and a p-type modulation doped quantum well interface, 2) self-aligned n-type and p-type channel contacts formed by ion implantation, 3) n-type metal contacts to the n-type ion implants and the bottom n-type layer structure, and 4) p-type metal contacts to the p-type ion implants and the top p-type layer structure. The active device structures are preferably realized with a material system of group III-V materials (such as GaAs/AlGaAs).
POET can be used to construct a variety of optoelectronic devices. POET can also be used to construct a variety of high performance transistor devices, such as complementary NHFET and PHFET unipolar devices as well as n-type and p-type HBT bipolar devices.